The present invention relates to digital electronic computer systems. More particularly, it relates to register means for use in such a computer system.
In computer systems, there are numerous registers where small amounts of data are temporarily stored. Traditionally a register is made up of a plurality of memory cells defining a word or byte length. These registers may be arranged with a single word or byte of memory on an individual chip. Alternatively, they may be arranged as a stack with a plurality of individual addressable words or bytes of memory on a single chip, each word or byte occupying a single row. The individual words or bytes are addressed by addressing the designated row. In such a stacked register, a conventional requirement is that the register may be addressed to both read and write during the same clock cycle. To that end there are provided separate read and write address decode networks. Because of the necessary bulk of such arrangements, the memory capacity of such units was relatively small. In one such arrangement, the register had a capacity of 16 words, or bytes, of five bits each.